Hi there in this video we are going to start
building the RAM so we are going to start off with an SR latch so let me just draw it
out for you. It is going to be implemented using NAND gates. So we place one NAND gate
and copy a second one and we will have 2 outputs and 2 inputs and we will give the input pins
names , that’s the 2 input pins and we have got 2 output pins. Now lets give then names
we will call one S for set and one R for reset one is Q and one NQ. Now NQ just means not
Q which means that NQ is the compliment of Q so if Q is a 1 then NQ would be a 0 and
visa-versa. So that is set and rest , our Q and our NQ . This is an active low SR latch
now it is active low because it’s natural state if I can use that term would be both
of them high , now let’s finish doing the drawing.Now we take the output from that and
feed it to the input of that one and the output of this one and feed it too the input of that
one. So we have a feedback loop. So this is an active low so only toggles whenever it
goes from a high state to a low state , so that is what active low means. So we are sitting
in a high state and in order for it to toggle it must go from high to low, so let’s do that
now. If I change this then the outputs will toggle if I make S a zero, then you see the
outputs q Q and NQ goes 1 and 0 now it doesn’t matter what I do with S now as the output
will retain it’s value . So if I put it back to our high value then if I toggle the R it
will toggle the output round the other way and make then 0 and 1 . When it has toggled
it once it won’t do it again. That is the output set. This is our active low SR latch.
Now we can draw a little truth table for that. Let’s have a look, I have already got it drawn
out from the previous video. Let’s go in here and we can have a look at this. This is the
truth table here for the SR latch we just looked at so this is the S and R inputs the
Q and NQ outputs. These are the SR inputs . It’s natural state is to be in S=R=1. so
if S=R=1 then Q and NQ are 0 and 1. If the value for S was to toggle from a 1 to a 0
the output would change from 0 , 1 to 1, 0 and then if we were to toggle it again only
this time the R was to toggle then it would go into a 0, 1 state. It would jump between
these 2 states 1, 0 and 0,1 . We seen that in the simulation. If both of these were 0
then both the outputs would be high and both the same and this is a not allowed state and
we want to make sure the outputs are compliments so this isa not allowed state. I will come
back to this in a minute. So that is our simple SR latch. Now what we want to do is we can
then build what is called a gated SR latch now let’s bring back up our Logisim and let
me change the circuit here and shift these back a bit , delete these off. See there is
an interesting thing you see the lines become red and there is a caption at the bottom saying
oscillation apparent. Now I am messing about with this while it was still in simulation
mode . So when I did that it goes into some confused state so I can reset by going SIMULATE
RESET SIMULATION and then you need to enable the simulation again . So that is back up
and running. So if I go ctrl v I can take this NAND gate and feed it in here and ctrl
d and take this NAND gate and feed it in here . Now we take the reset pin and feed it in
here , we talked the set pin and feed it in here and these 2 pins get tied together and
go to a common pin which we will call E for enable , so it becomes an enable pin, it’s
small so let’s make it 20 . This is a very similar circuit to the previous one but now
by adding these gates here we have now changed this to an active high latch so it’s natural
state would be both inputs being zero and the output will only toggle when the input
changes from a low value to a high value so that’s why it’;s called an active high. It
is also a gated latch because it’s controlled by this enable pin here so nothing will happen
on the outputs unless the enable goes high . So let’s set the enable to high then we
can toggle the output by changing S to high so there you go the output has now changed
but if I were to make S low again nothing happens so the circuit retains that state
and the same here if we set that back to zero if I toggle this one that will become a zero
on this be a one there you that’s it toggled. If I change these nothing happen because it
has retained that state. We can draw out the truth table for this as well and again I have
got it sitting here. So again we have the S and R inputs but now we have an ENABLE so
we have now got 8 possible input values . I have only draw 4 of them because the other
4 are when the enable is set low , now when it is set low what happens is it just retains
it’s previous Q and NQ value so what we are interested in is how the circuit changes.
So if we set the ENABLE high , and it’s natural state is bot S=R=0 and in that case Q is
1 and NQ is 0 and if we were to toggle the R bit to high then this would toggle the outputs
to 0 and 1 and if you did it the other way round and we toggled the S bit high it would
go to 1 and 0 so it toggles between these 2 states here and there is a not allowed state,
so the 1, 1 would make both these outputs the same and we say that is not allowed . Let’s
now go on to the next circuit which ensures that this state here the not allowed state
does not occur. So let’s have a look, we will go back to Logisim and I will redraw this
out . We can see quite easily we can ensure ths S and R are never going to be the same.
We can take a connection from here and put a NOT gate in and face it south . So if I
put this in here and then delete of these inputs here then that ensures that this here
is never the same as this value here so when this is a zero this is a 1 . Now we have a
really interesting bit of circuitry now that we can use as a little memory cell so if we
set ENABLE high then this becomes a transparent latch so it passes on whatever is in S straight
through to Q so when I put a 1 in there we get a 1 in there and a 0 gives a 0 so if we
toggle through the S then it runs from the input to the output. We can use this as a
memory cell because if we want to set the Q to high we can put the S as high , whenever
we put the enable low we can no longer pass anything through so no matter what I do with
this S the output is fixed , it has retained that value. A simpler way of doing this is
by getting rid of this Not gate and do the same implementation and have the same truth
table but without that not gate so we are saving on a gate so that is what I am going
to do just now so let’s move this. We will delete this wire the input now comes from
the output of this one , we can delete this and we don’t need this and we can take our
ENABLE straight in here. Now from me messing about with this it has gone into this oscillation
state so I can reset the simulation and enable the simulation again. If I set the ENABLE
high . What I will also do to simplify things, is we are not interested in the NQ output
all we are interested in in one output which is the bit of memory we are trying to maintain.
If I set S as a high you see we get an output so this becomes a transparent latch exactly
the same as the previous one but with only 4 gates and also the not allowed state never
occurs. This here is a little memory bit . So let’s think about how we are going to use
it. What we could do if we want to retain a bit of memory then we could ensure that
the ENABLE goes high first, it is waiting for an input . The input S goes high and the
ENABLE bit then goes low and that is now set. So if our SET then goes low it has retained
a high on the output Q.So that is in essence what a memory cell is. What we will do is
create a n instance here so we do not need to bother looking at this level again . So
we will be one level further up the hierarchy. So let’s create the instance now. So if I
go into SIMULATE ADD CIRCUIT. There is actually a box appeared there but you cannot see it
but when you run the tool it will appear . So we will call this CPU_MEM_1. So that’s us
got CPU_MEM_1 so we will go in and we will grad this instance here and we will cut and
paste it. Now we have it in CPU_MEM_1. Now we will change the pin names to O for output.
Make it a small O. So we have a SET ENABLE and O. So we go to CPU_MEM_1 and right click
and change the circuit appearance. We will change the appearance of it . Just redraw
it out . Create a larger box and grab the pins and move the inputs, not I can see a
little box in the corner which shows me the pin but it is just off the screen. So let’s
give the pins names say S , E and grab them and shift them to position and O for output
and we can give it a name and call it CPU_MEM_1.I don’t intend to go through
all of these for every single instance . I just thought I’d do the first couple to get
a look at how I am going to build up the CPU. If I go into main I can now choose CPU_MEM_1.
I can pop it down and then make an 8 bit memory. That is enough for this video we will come
back and I will an 8 bit memory cell. So 1 byte and we will also stat to look at the
decoder as well. Ok thank you and goodbye.

8 BIT CPU 1 Bit Memory

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